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74LCXH16245 Low Voltage 16-Bit Bidirectional Transceiver with Bushold
May 2002 Revised May 2002
74LCXH16245 Low Voltage 16-Bit Bidirectional Transceiver with Bushold
General Description
The LCXH16245 contains sixteen non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is designed for low voltage (2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The device is byte controlled. Each byte has separate control inputs which could be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B Ports by placing them in a high impedance state. The LCXH16245 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level. The LCXH16245 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.
Features
s 2.3V-3.6V VCC specifications provided s 4.5 ns tPD max (VCC = 3.3V), 20 A ICC max s Power-down high impedance outputs s Bushold on inputs eliminates the need for external pull-up/pull-down resistors s 24 mA output drive (VCC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance conforms to the requirements of JESD78 s ESD performance: Human body model > 2000V Machine model > 200V s Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Ordering Code:
Order Number 74LCXH16245G (Note 1) (Note 2) 74LCXH16245MTD (Note 2) Package Number BGA54A MTD48 Package Description 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 1: Ordering Code "G" indicates Trays. Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
(c) 2002 Fairchild Semiconductor Corporation
DS500581
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74LCXH16245
Connection Diagrams
Pin Assignment for SSOP and TSSOP
Pin Descriptions
Pin Names OEn T/Rn A0-A15 B0-B15 Description Output Enable Input Transmit/Receive Input Side A Inputs or 3-STATE Outputs (Bushold) Side B Inputs or 3-STATE Outputs (Bushold)
FBGA Pin Assignments
1 A B C D E F G H J B0 B2 B4 B6 B8 B10 B12 B14 B15 2 NC B1 B3 B5 B7 B9 B11 B13 NC 3 T/R1 NC VCC GND GND GND VCC NC T/R2 4 OE1 NC VCC GND GND GND VCC NC OE2 5 NC A1 A3 A5 A7 A9 A11 A13 NC 6 A0 A2 A4 A6 A8 A10 A12 A14 A15
Truth Tables
Inputs OE1 L L H Inputs Pin Assignment for FBGA OE2 L L H T/R2 L H X Outputs Bus B8-B15 Data to Bus A8-A15 Bus A8-A15 Data to Bus B8-B15 HIGH Z State on A8-A15, B8-B15 T/R1 L H X Outputs Bus B0-B7 Data to Bus A0-A7 Bus A0-A7 Data to Bus B0-B7 HIGH Z State on A0-A7, B0-B7
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance
Logic Diagram
(Top Thru View)
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74LCXH16245
Absolute Maximum Ratings(Note 3)
Symbol VCC VI VO IIK IOK IO ICC IGND TSTG Parameter Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Source/Sink Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Value Conditions Units V V Output in 3-STATE Output in HIGH or LOW State (Note 4) VI < GND VO < GND VO > VCC V mA mA mA mA mA
-0.5 to +7.0 -0.5 to VCC + 0.5 -0.5 to +7.0 -0.5 to VCC + 0.5 -50 -50 +50 50 100 100 -65 to +150
C
Recommended Operating Conditions (Note 5)
Symbol VCC VI VO IOH/IOL Supply Voltage Input Voltage Output Voltage Output Current HIGH or LOW State 3-STATE VCC = 3.0V - 3.6V VCC = 2.7V - 3.0V VCC = 2.3V - 2.7V TA Free-Air Operating Temperature Input Edge Rate, VIN = 0.8V-2.0V, VCC = 3.0V Parameter Operating Data Retention Min 2.0 1.5 0 0 0 Max 3.6 3.6 VCC VCC VCC Units V V V
24 12 8 -40
0 85 10 mA
C
ns/V
t/V
Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 4: IO Absolute Maximum Rating must be observed. Note 5: Floating or unused control inputs must be HIGH or LOW.
DC Electrical Characteristics
Symbol VIH VIL VOH Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage IOH = -100 A IOH = -8 mA IOH = -12 mA IOH = -18 mA IOH = -24 mA VOL LOW Level Output Voltage IOL = 100 A IOL = 8mA IOL = 12 mA IOL = 16 mA IOL = 24 mA II Input Leakage Current Data VI = VCC or GND Control O VI 5.5 Conditions VCC (V) 2.3 - 2.7 2.7 - 3.6 2.3 - 2.7 2.7 - 3.6 2.3 - 3.6 2.3 2.7 3.0 3.0 2.3 - 3.6 2.3 2.7 3.0 3.0 2.3 - 3.6 2.3 - 3.6 VCC - 0.2 1.8 2.2 2.4 2.2 0.2 0.6 0.4 0.4 0.55 5.0 5.0 A V V TA = -40C to +85C Min 1.7 2.0 0.7 0.8 Max Units V V
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74LCXH16245
DC Electrical Characteristics
Symbol II(HOLD) Parameter Bushold Input Minimum Drive Hold Current
(Continued)
VCC (V) TA = -40C to +85C Min 45 -45 75 -75 300 -300 450 -450 5.0 10 20 500 A A A A A A Max
Conditions VIN = 0.7V VIN = 1.7V VIN = 0.8V VIN = 2.0V
Units
2.3 3.0 2.7 3.6 2.3 - 3.6 0 2.3-3.6 2.3-3.6
II(OD)
Bushold Input Over-Drive Current to Change State
(Note 6) (Note 7) (Note 6) (Note 7)
IOZ IOFF ICC ICC
3-STATE I/O Leakage Power-Off Leakage Current Quiescent Supply Current Increase in ICC per Input
VO = VCC or GND VI or VO = 5.5V VI = VCC or GND VIH = V CC -0.6V
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
AC Electrical Characteristics
TA = -40C to +85C, RL = 500 Symbol Parameter VCC = 3.3V 0.3V CL = 50 pF Min tPHL tPLH tPZL tPZH tPLZ tPHZ tOSHL tOSLH Output to Output Skew (Note 8) Output Disable Time Propagation Delay An to Bn or Bn to An Output Enable Time 1.0 1.0 1.0 1.0 1.0 1.0 Max 4.5 4.5 6.5 6.5 6.4 6.4 1.0 1.0 VCC = 2.7V CL = 50 pF Min 1.0 1.0 1.0 1.0 1.0 1.0 Max 5.2 5.2 7.2 7.2 6.9 6.9 VCC = 2.5V 0.2V CL = 30 pF Min 1.0 1.0 1.0 1.0 1.0 1.0 Max 5.4 5.4 8.5 8.5 7.7 7.7 ns ns ns ns Units
Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design.
Dynamic Switching Characteristics
Symbol VOLP VOLV Parameter Quiet Output Dynamic Peak VOL Quiet Output Dynamic Valley VOL Conditions CL = 50 pF, VIH = 3.3V, VIL = 0V CL = 30 pF, VIH = 2.5V, VIL = 0V CL = 50 pF, VIH = 3.3V, VIL = 0V CL = 30 pF, VIH = 2.5V, VIL = 0V VCC (V) 3.3 2.5 3.3 2.5 TA = 25C Typical 0.8 0.6 -0.8 -0.6 Units V V
Capacitance
Symbol CIN CI/O CPD Input Capacitance Input/Output Capacitance Power Dissipation Capacitance Parameter Conditions VCC = Open, VI = 0V or VCC VCC = 3.3V, VI = 0V or VCC VCC = 3.3V, VI = 0V or VCC, f = 10 MHz Typical 7 8 20 Units pF pF pF
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74LCXH16245
AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) Test tPLH, tPHL tPZL, tPLZ tPZH, tPHZ Switch Open 6V at VCC = 3.3 0.3V, 2.7V and VCC x 2 at VCC = 2.5 0.2V GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output High Enable and Disable Times for Logic
Propagation Delay. Pulse Width and trec Waveforms
Setup Time, Hold Time and Recovery Time for Logic
3-STATE Output Low Enable and Disable Times for Logic FIGURE 2. Waveforms (Input Characteristics; f =1MHz, tr = tf = 3ns) Symbol Vmi Vmo Vx Vy VCC 3.3V 0.3V 1.5V 1.5V VOL + 0.3V VOH - 0.3V 2.7V 1.5V 1.5V VOL + 0.3V VOH - 0.3V
trise and tfall
2.5V 0.2V VCC/2 VCC/2 VOL + 0.15V VOH - 0.15V
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74LCXH16245
Schematic Diagram Generic for LCX Family
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74LCXH16245
Physical Dimensions inches (millimeters) unless otherwise noted
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA54A
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74LCXH16245 Low Voltage 16-Bit Bidirectional Transceiver with Bushold
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 8 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

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